What is Thread Activation Tracing?

When developing an RTOS based application it is important to be able to validate whether the different threads are active when they should. In order to do so, AVIX offers Thread Activation Tracing. Thread Activation Tracing is a mechanism allowing to show the activation of threads on a Logic Analyzer. Doing so provides a graphical overview of the scheduling. This graphical overview provides such a level of insight in the scheduling process that it is not only usable for validation but also proves to be very valuable for training people to work with an RTOS. Thread Activation Tracing provides an unprecedented insight in the activities going on in the core of the scheduler, turning the black box of RTOS based development white. Since Thread Activation Tracing is built into the core of AVIX, whenever a thread is activated or deactivated, this is shown on the trace output. This is much more accurate than application level tracing where trace statements are added to the application code. Also the AVIX mechanism comes without the performance penalty introduced by application level tracing.

What does Thread Activation Tracing show and how is it used?

Thread Activation Tracing shows a graph on a logic analyzer consisting of multiple lines. Each line corresponds with a thread. When the line is high, the corresponding thread is active, when low it is not. The mechanism works both in the MPLAB simulator and on silicon. In the MPLAB simulator use can be made of the simulated Logic Analyzer. When using silicon use is made of a real Logic Analyzer. For both scenarios a sample is shown in the figures below.

Thread Activation Tracing works by assigning a digital I/O port to a thread. Any available I/O port can be assigned to any desirable thread, even to the idle thread. The code below shows a sample. The selected I/O ports are assigned to a channel of the MPLAB™ simulated Logic Analyzer or connected in hardware to a real Logic Analyzer, depending whether you are developing in the simulator or are testing on real hardware. After this, all you have to do is run your program and watch the activation diagram show up on the logic analyzer.

Can Thread Activation Tracing always be used?

Thread Activation Tracing is build right into the very core of AVIX and is always available. You do not need a special version of AVIX or create a specific build. When you use AVIX you can use Thread Activation Tracing. It can be used during development using the MPLAB™ built-in simulated Logic Analyzer and it can be used in your end product with a hardware Logic Analyzer. It can be used during development for testing or in the end product for fault searching. Although Thread Activation Tracing is and stays present in AVIX, you can decide to create a build of your software disabling the function calls assigning a Trace Port to a thread. You can decide to do so for instance when program size should be as small as possible.

Does Thread Activation Tracing influence performance?

Thread Activation tracing consumes 6 CPU cycles when a context switch is made from one thread to another. These cycles are part of the regular scheduling which, including Thread Activation Tracing, consumes ~90 CPU cycles. Most competing products (not offering Thread Activation Tracing) already consume >>100 CPU cycles for a context switch so whether you look at it as an absolute figure or a relative figure, it is valid to state Thread Activation Tracing does not influence performance. The mentioned cycles are always consumed, whether you create a build with or without Thread Activation Tracing. In a build without Thread Activation Tracing, the mechanism executes a dummy operation consuming the same amount of cycles. Doing so, the timing behavior of your system is exactly the same, with or without Thread Activation Tracing meaning your validation results you obtained using the mechanism are 100% valid when in a later stage of your development you decide to no longer use the tracing.