Tracing

 

What is Thread Activation Tracing?

One of the important aspects of developing RTOS based systems is validation of thread activation. Although the system as a whole might seem to work correctly, still one can be in doubt whether threads are scheduled as intended. In order to assist here, AVIX offers Thread Activation Tracing. Thread Activation Tracing is a mechanism enabling to show the activation of threads on a Logic Analyzer. Doing so provides a graphical overview of the scheduling. This graphical overview provides such a level of insight in the scheduling process that it is not only usable for validation but also proves to be very usable for training people to work with an RTOS. Thread Activation Tracing provides an unprecedented insight in the activities going on in the core of the scheduler turning the black box of RTOS based development white. Since Thread Activation Tracing is built into the core of AVIX, whenever a thread is activated or deactivated, this is shown on the trace output. This is much more accurate than building trace statements into the application and, as explained further on, comes without the performance penalty caused by application level tracing.

 

How is it used?

 
 tavixThreadId threadId;
 
 threadId = avixThread_Create(NULL, threadFunc, NULL, 1, 100, FALSE);
 avixThread_SetTracePort(threadId, AVIX_TRACE_PORT_D, 1);
 

Thread Activation Tracing works by assigning a digital I/O port to a thread. Any available I/O port can be assigned to any desirable thread, even to the idle thread. The code to the right shows a smaple. Next the selected I/O ports are assigned to a channel of the MPLAB simulated Logic Analyzer or connected in hardware to a real Logic Analyzer, depending whether you are developing in the simulator or are testing on real hardware. After this, all you have to do is run your program and watch the activation diagram show up on the logic analyzer.

 

Microchip MPLAB Logic Analyzer sample of AVIX-RTOS Thread Activation TracingIn the MPLAB screen dump on the right, a sample is shown of a system consisting of four threads. RR_Thread1, 2 and 3 are threads running at the same priority and thus are scheduled in a round robin fashion. Thread HP_Thread has a higher priority and wakes up periodically preempting whatever thread is running at that moment since it has the highest priority. You can exactly see what is going on and whether or not the threads behave as intended.

 

LogicPort Logic Analyzer sample of AVIX-RTOS Thread Activation TracingThat Thread Activation Tracing can not only be used in the simulator environment is demonstrated with the picture to the right, showing a screen dump of a LogicPort USB Logic Analyzer connected to an Explorer 16 development board running an AVIX based application. Using Thread Activation Tracing with a hardware based system and a real Logic Analyzer offers unprecedented capabilities for testing. With the Logic Analyzer trigger facilities numerous timing aspects of your AVIX based system can be tested and triggered upon when the predetermined situation occurs.

 

Can Thread Activation Tracing always be used?

Thread Activation Tracing is build right into the very core of AVIX and is always available. You do not need a special version of AVIX or create a specific build. When you use AVIX you can use Thread Activation Tracing. It can be used during development using the MPLAB built-in simulated Logic Analyzer and it can be used in your end product with a hardware Logic Analyzer. It can be used during development for testing or in the end product for fault searching. Although Thread Activation Tracing is and stays present in AVIX, you can decide to create a build of your software disabling the function calls assigning a Trace Port to a thread. You can decide to do so for instance when program size should be as small as possible.

 

 

Does Thread Activation Tracing influence performance?

Thread Activation tracing consumes ~10 CPU cycles when a context switch is made from one thread to another. These cycles are part of the regular scheduling which, including Thread Activation Tracing, consume ~90 CPU cycles. Most competing products (not offering Thread Activation Tracing) already consume >>100 CPU cycles for a context switch so whether you look at it as an absolute figure or a relative figure, it is valid to state Thread Activation Tracing does not influence performance. The mentioned cycles are always consumed, whether you create a build with or without Thread Activation Tracing. In a build without Thread Activation Tracing, the mechanism executes a dummy operation consuming the same amount of cycles. Doing so, the timing behavior of your system is exactly the same, with or without Thread Activation Tracing meaning your validation results you obtained using the mechanism are 100% valid when in a later stage or your development you decide no longer to use it.

 

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